1. Field of the Invention
The present invention relates to a semiconductor device that includes a drive circuit driving a signal line in response to a signal to be transmitted or an amplifier amplifying a signal appearing on a signal line. Particularly, the present invention relates to a semiconductor device as a DRAM provided with a sense amplifier amplifying a read signal of a memory cell and a read amplifier amplifying an output signal of the sense amplifier.
2. Description of Related Art
In recent semiconductor device such as a DRAM, a large number of bit lines are required to be arranged in a memory cell array with a decrease in size and an increase in capacity, and thus a circuit scale of sense amplifiers connected to the bit lines tends to become large. Therefore, configurations capable of reducing the circuit scale have been proposed in which single-ended sense amplifiers are arranged instead of conventional differential type sense amplifiers (for example, refer to Patent Reference 1). A signal amplified by the sense amplifier is typically transmitted to a read amplifier through an I/O configuration such as a local input/output line and a main input/output line. In the DRAM employing the above-mentioned single-ended sense amplifiers, the subsequent IO configuration and the read amplifiers are desired to be of the single-ended type. In this manner, a configuration using single-ended type circuits including the sense amplifiers and subsequent circuits has an effect of reducing the circuit scale of the DRAM.    [Patent Reference 1] Japanese Patent Application Laid-open No. 2010-55729 (U.S. Pub. No. 2010/054065 A1)
When configuring the single-ended type read amplifier in the DRAM, a reference potential received in the differential type cannot be used, and therefore data transmitted from the sense amplifier to the read amplifier through an input/output line needs to have sufficient amplitude. In this case, by connecting an auxiliary capacitor, for example, to an input node of the read amplifier, a charge transfer via the auxiliary capacitor allows the amplitude of the input/output line to become large so that a signal having a large potential variation is transmitted to the read amplifier, and the transferred signal can be amplified by the read amplifier. However, on the assumption that a general MOS transistor is used as the above auxiliary capacitor, the MOS transistor has a characteristic in which a gate capacitance thereof increases unless a gate-source voltage Vgs is within a region near a threshold voltage. Therefore, the gate capacitance of the MOS transistor is visible from the input node before the amplifying operation of the read amplifier, and this causes a decrease in amplitude of the transmission signal, thereby decreasing operating margin of the read amplifier. In this manner, the present inventor has discovered a problem that it is difficult to improve the operating margin by obtaining the sufficient amplitude of the transmission signal by using the auxiliary capacitor that is not restricted by the characteristic of the MOS transistor.